PURPOSE: To execute variant operation mode and timing of an image memory by generating an arbitrary memory control signal, a plotting address and plotting data without changing the hardware constitution.

CONSTITUTION: The device is constituted by containing a display control circuit 2, an image memory 4, a video control circuit 5, a storage circuit 6, and a selecting circuit 7. In such a state, by describing a first memory control signal, a first address and plotting data to the image memory 4 by arbitrary codes of '0' and '1', an arbitrary first memory control signal, a first address and plotting data are generated without changing the hardware constitution. In such a way, variant operation mode and timing of the image memory 4 can be realized.