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Patent Searching and Data


Title:
POLISHING DEVICE AND POLISHING METHOD FOR SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JPH1058316
Kind Code:
A
Abstract:

To evenly polish a semiconductor substrate within the plane thereof by use of a polishing pad having elasticity.

A polishing pad 12 having elasticity is attached to the upper surface of the pad placement part 11a of a level block 11 formed to have the pad placement part 11a with flat surface and a rotary shaft 11b. Also, A substrate holding head 14 having a substrate holding part 14a of recessed type cross section and a support shaft 14 is provided above the polishing pad 12. A guide member 15A formed to have approximately the same thickness as wafer 13 and made for example, of a resin is also provided between the polishing pad 12 and the substrate holding head 14. The guide member 15A is formed to have four circular openings 15a for the insertion of the wafer 13. In this case, the polishing pad 12 is always pressed with the wafer 13 and the guide member 15A.


Inventors:
NISHIO MIKIO
MURAKAMI TOMOYASU
SATAKE MITSUNARI
Application Number:
JP21071696A
Publication Date:
March 03, 1998
Filing Date:
August 09, 1996
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
B24B57/02; B24B37/005; B24B37/04; B24B37/07; B24B37/10; B24B37/20; B24B37/24; B24B37/30; H01L21/304; (IPC1-7): B24B37/04; B24B37/00; B24B57/02; H01L21/304
Attorney, Agent or Firm:
Hiroshi Maeda (2 outside)