Title:
POLISHING METHOD FOR SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JPH06761
Kind Code:
A
Abstract:
PURPOSE: To improve the flatness of a wafer and clarify the relation with the flatness without requiring the elaborate modification of a device by cooling an abrasive.
CONSTITUTION: An abrasive 7 is cooled to about 12°C with a chiller and fed, and the temperature rise level of a lapping machine is reduced. The flatness of a wafer 1 is improved to about twice, and the fluctuation width is reduced to about 1/3. The cooling condition of the abrasive 7 is desirably set to 15°C or below, and preferably about 5-10°C. When it exceeds 15°C, no cooling effect is obtained. Freezing may occur below 5°C, and the fluid state of the abrasive 7 is unfavorably deteriorated.
Inventors:
SHIBAYAMA TAKASANE
Application Number:
JP16512392A
Publication Date:
January 11, 1994
Filing Date:
June 23, 1992
Export Citation:
Assignee:
KAWASAKI STEEL CO
International Classes:
B24B37/015; B24B37/04; B24B37/30; H01L21/304; (IPC1-7): B24B37/04; H01L21/304
Attorney, Agent or Firm:
Eiichi Kobayashi
Next Patent: SINGLE-SIDE POLISHING METHOD FOR WAFER