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Patent Searching and Data


Title:
POLLING CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH03147048
Kind Code:
A
Abstract:

PURPOSE: To arbitrarily set a polling order as against plural communication controllers by storing polling numbers in correspondence with the polling order and transmitting the polling numbers at prescribed intervals in accordance with the polling order.

CONSTITUTION: When a host interface circuit 11 receives the machine number and the address of the communication controller from a host processor 19, it transmits the address to the ADD terminal of RAM 12 through a 2-1 selector circuit 15 and the machine number to the Di terminal of RAM 12, and stores the machine number of the communication controller in the address concerned in RAM 12. Then, a polling control circuit 16 is started from the host processor 19 through the host interface circuit 11 and the polling control circuit 16 operates a ring counter 14, the 2-1 selector circuit 15 and a read control circuit 17 so as to execute polling. The ring counter 14 outputs continuous numerics at the prescribed intervals and the machine numbers of the communication controller, which are stored in the addresses coincide with the numerics are outputted in the order of the addresses.


Inventors:
MASUDA HIROKI
Application Number:
JP28541089A
Publication Date:
June 24, 1991
Filing Date:
November 01, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F15/16; G06F13/366; G06F15/177; (IPC1-7): G06F13/366; G06F15/16
Attorney, Agent or Firm:
Sadaichi Igita