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Title:
POLYMER PLANAR-METALLIZATION TYPE SEMICONDUCTOR DEVICE AND MANUFACTURE THREROF
Document Type and Number:
Japanese Patent JPS6366953
Kind Code:
A
Abstract:

PURPOSE: To improve the adhesive strength of a metallic frame and a molding resin, and to enhance heat-dissipating characteristics by forming irregularities on the radiating surface of the metallic frame while executing blast treatment.

CONSTITUTION: In a semiconductor device having a shape that the radiating surface (the rear) of a metallic frame 1 on which a semiconductor chip 2 is mounted is electrically insulated by a resin 3, irregularities are formed to the radiating surface M of the metallic frame 1 while blast treatment is executed. The radiating surface M of the metallic frame 1 for a discrete power element is stamping-worked (irregularly-worked) on one surface in size of the square of 0.1mm depth and 0.5mm width, and roughened-surface working is executed to the surface of the radiating surface M through blast treatment. In this case, the working shape of irregularities may take a V shape, or a plane shape may take a striped, polygonal, circular or rectangular shape, etc.


Inventors:
EMOTO TAKAO
KATO TOSHIHIRO
Application Number:
JP21099586A
Publication Date:
March 25, 1988
Filing Date:
September 08, 1986
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L23/28; H01L23/29; H01L23/36; (IPC1-7): H01L23/28; H01L23/36
Domestic Patent References:
JPS60244052A1985-12-03
JPS60186044A1985-09-21
JPS60118252U1985-08-09
Attorney, Agent or Firm:
Takehiko Suzue