To enhance the power efficiency by using a series resonance circuit so as to attenuate even/odd number harmonics in the power amplifier for a portable telephone system or the like.

An input signal from an input terminal Pin is given to a capacitor 21, in which its DC component is cut off and the resulting signal is fed to the gate of a FET 25 via an input impedance matching circuit consisting of an inductor 22 and capacitors 23, 24. The gate of the FET 25 is biased by voltage dividing resistors 26, 27 and the drain of the FET 25 connects to a power supply via a choke inductor 31. The FET 25 amplifies the signal and its output signal is fed to an output terminal Pout via a capacitor 36 and an output impedance matching circuit consisting of an inductor 32 and capacitors 34, 35. Series resonance circuits 40, 41 are connected to the inductor 32. A second harmonic with respect to a fundamental frequency in the output signal is largely attenuated by the resonance frequency of each of the series resonance circuits 40, 41.