Title:
深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用の電力管理
Document Type and Number:
Japanese Patent JP7340612
Kind Code:
B2
Abstract:
Numerous embodiments are disclosed for converting neuron current output by a vector-by-matrix multiplication (VMM) array into neuron current-based time pulses and providing such pulses as an input to another VMM array within an artificial neural network. Numerous embodiments are disclosed for converting the neuron current-based time pulses into analog current or voltage values if an analog input is needed for the VMM array.
Inventors:
Trang, Hugh, Van
Tiwari, bipin
Latency, mark
Doe, Nan
Tiwari, bipin
Latency, mark
Doe, Nan
Application Number:
JP2021541296A
Publication Date:
September 07, 2023
Filing Date:
September 06, 2019
Export Citation:
Assignee:
SILICON STORAGE TECHNOLOGY, INC.
International Classes:
G06G7/60; G06N3/063; G11C11/54; G11C16/04
Domestic Patent References:
| JP2004157755A | ||||
| JP2005175070A | ||||
| JP6119566A | ||||
| JP2001211211A | ||||
| JP2009135623A | ||||
| JP2005122467A | ||||
| JP2009211153A |
Foreign References:
| WO2017200883A1 |
Attorney, Agent or Firm:
Patent Attorney Corporation Wisdom International Patent and Trademark Office