To prevent a power-saving mode from being shifted in the process of application and to simplify an activity detecting circuit by enabling the counting of a timeout of a mode shift for power saving when an idle function is issued and disabling the counting of the timeout when an activity is detected.

If a power-saving mode shift timer 3 enters a timeout state without detecting any activity by an activity detection part 1, a power-saving mode control part 2 changes a CPU 4 to LOW SPEED. If the activity detection part 1 detects an activity halfway, the activity detection part 1 sends an indication to the power-saving mode control part 2 to put the CPU 4 back to HIGH SPEED. At the same time, the count of the power-saving mode shift timer 3 is reset and a timer enable register 5 is reset to performs a disabling process so that the power-saving mode shift timer 3 counts.