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Title:
PROCESSOR POWER CONTROL APPARATUS AND PROCESSOR POWER CONTROL METHOD
Document Type and Number:
Japanese Patent JP2005285093
Kind Code:
A
Abstract:

To optimally control an operating frequency of a CPU while ensuring real-time property for event processing in a real-time system for handling a plurality of tasks.

In a configuration for supplying power to a processor, there are provided a task request performance table 22 for storing performance solely requested by a task; a power mode table 25 determining an operating frequency of a processor that executes required system request performance; a system request performance calculation block 21 for calculating a system request performance by adding performance requested by several tasks when some tasks perform execution request in the same period; and a power mode determination block 23 which calculates new system request performance by adding processing requests at a time point of a processing request when there are processing requests from tasks, sets the operating frequency of the processor, and continues setting of the operating frequency when there is a residual tasks when a task completes processing, or turns the system request performance into most power saving mode when there is no residual task.


Inventors:
NISHIYAMA HIROHITO
Application Number:
JP2005017643A
Publication Date:
October 13, 2005
Filing Date:
January 26, 2005
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F1/32; G06F1/04; G06F9/48; (IPC1-7): G06F1/04; G06F1/32; G06F9/48
Domestic Patent References:
JPH0876874A1996-03-22
JPH09297688A1997-11-18
JPH11212662A1999-08-06
JP2002182776A2002-06-26
JP2003108260A2003-04-11
JP2003256067A2003-09-10
Foreign References:
WO2002021245A12002-03-14
Attorney, Agent or Firm:
Shoji Mizoi