PURPOSE: To simplify the circuit constitution by obtaining automatically the self-position information in the order of processor arrays from the self-position signal delayed in a processor and a clock and a reset signal which are used in common to processors.

CONSTITUTION: An input terminal 1-4 for the self-position signal is connected to a self-position signal output terminal 1-5 of a processor 1-1 of a precedent stage, and the signal of the terminal 1-5 is obtained by delaying the signal of the terminal 1-4 by a delay circuit 1-6. A clock, a reset signal, and the self- position signal input are supplied to a counter 1-7. The circuit 1-6 is identical with a D type FF which strobes at the rise of the clock. Then a reset signal 2-4 of the counter 1-7 is produced from a reset signal 2-1, and the count value is identical with the rising frequency of a clock 2-2 contained in 'H' of the self-position signal obtained after the counter 1-7 is reset. This value can be set at 0, 1 and 2 with the first, second and third stages respectively.