To provide a processor which is equipped with a clock gating function of data dependence.
This processor is provided with an operation controller 110, an arithmetic unit 120 and a memory 130. The controller 110 always receives an ungated clock signal from a clock controller and also asserts a request signal when an operation start signal is issued together with a parameter signal which designates a use resource in the unit 120 from a microcontorller. The clock controller respectively supplies a gated clock signal to the unit 120 and the memory 130 in response to the request signal. The controller 110 determines whether or not a status signal supplied from the unit 120 meets a prescribed finishing condition and negates the request signal when it meets the finishing condition. Consequently, supply of the clock signal to the unit 120 and the memory 130 is stopped.
ARAKI TOSHIYUKI
OTANI AKIHIKO
