PURPOSE: To execute the multi-loop program easily and speedily, by starting respective loop frequencies in the loop frequency stack memory in the program control circuit, for the program including the multi-loop.
CONSTITUTION: The address for accessing the program memory is outputted from the output port 18. This address is inputted through the incrementer 21 to the program counter 15, 1 is added and is stored in the return address stack memory 14. The loop frequency from the input port 12 is stored in the loop frequency stack memory 23, and the loop frequency is inputted to the decrementer 27 and 1 is decreased. Zero of the output of the decrementer 27 is detected by the zero detector 28. The instruction explanation block 16 controls the operation of the respective parts by explaining the instruction of the read program. The multiplexer 11 selects and inputs the address from the return address stack memory 14 or program counter 15.
YAMAMOTO MICHIYUKI
KATOU RIYOUHEI
| JPS58101345A | 1983-06-16 | |||
| JPS56140444A | 1981-11-02 |
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