To improve security of a configuration program of the programmable logic device.
A programmable logic device 100 includes a hardware decryption processor 104 including a register 110 having stored therein a first secret key. A non-volatile memory 102 is arranged to store a configuration program which has been encrypted with the first secret key. The hardware decryption processor 104 is operable, when power is applied, to decrypt the encrypted configuration program and to configure a programmable array 108 of a logic element. The programmable array 108 is operable to decrypt the configuration program using the first secret key, to generate a second secret key, and to adapt the configuration program. The configured programmable array 108 is operable to re-encrypt the adapted configuration program using the first secret key and to replace the original program.
KEATING STEPHEN MARK
Eiichi Tamura
Seiji Iga