Title:
プログラマブル論理集積回路、設計支援システム及びコンフィグレーション方法
Document Type and Number:
Japanese Patent JP6860916
Kind Code:
B2
Abstract:
Provided is a programmable logic integrated circuit wherein even if a failure occurs in any resistance-variable element, remedy would be possible and hence the improvement of reliability has been achieved. In a programmable logic integrated circuit comprising resistance-variable elements, when the states of the resistance-variable elements are to be changed according to externally inputted configuration information, a control means uses a reading means to read the states of the respective resistance-variable elements, and then uses a writing means to change only the states of resistance-changing elements that are different from a state indicated by the configuration information.
Inventors:
Noboru Sakimura
Yukihide Tsuji
Ayuka Tada
White Asahi
Miyamura Shin
Nehashi Ryusuke
Yukihide Tsuji
Ayuka Tada
White Asahi
Miyamura Shin
Nehashi Ryusuke
Application Number:
JP2017521680A
Publication Date:
April 21, 2021
Filing Date:
May 23, 2016
Export Citation:
Assignee:
Nanobridge Semiconductor Co., Ltd.
International Classes:
H03K19/17736; G06F30/32; H01L21/82
Domestic Patent References:
| JP2013236082A | ||||
| JP6045451A | ||||
| JP2016178229A | ||||
| JP2016129081A |
Foreign References:
| WO2010061760A1 | ||||
| US20100108479 | ||||
| US5498975 |
Attorney, Agent or Firm:
Patent Service Corporation Taiyo International Patent Office