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Title:
PROGRAMMABLE RESISTANCE ELEMENT
Document Type and Number:
Japanese Patent JP3222166
Kind Code:
B2
Abstract:

PURPOSE: To provide a programmable resistance element, which can be used both as a resistance element in such device as a resistor ladder-type device used for a neuron circuit network or an analogue-digital converter, and as a non-volatile memory.
CONSTITUTION: A channel 16 comprising a gallium arsenide layer is provided, and a programming barrier wall 18 is assigned outside a channel. An accumulation gate 20 comprising a genuine gallium arsenide layer is assigned outside the programming barrier wall, and an insulator 22 comprising an aluminum- gallium arsenide layer is assigned outside the accumulation gate. A first contact body 26 and a second contact body 28 assigned away from each other contact to the channel.


Inventors:
Gary A. Frazier
Albert H. Tadeiken
William A. Frensley
Han-Tsong Yuan
Donald T. Coleman
Robert tee bait
Mark A. Reid
Application Number:
JP30064691A
Publication Date:
October 22, 2001
Filing Date:
November 15, 1991
Export Citation:
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Assignee:
Texas Instruments Incorporated
International Classes:
H01L27/10; G06G7/62; G06N3/063; H01L21/8247; H01L29/788; H01L29/792; (IPC1-7): H01L27/10; H01L21/8247; H01L29/788; H01L29/792
Domestic Patent References:
JP3123083A
JP272673A
JP6139582A
JP6276565A
JP6242569A
JP61241968A
JP6184063A
Other References:
【文献】米国特許4974038(US,A)
Attorney, Agent or Firm:
Akira Asamura (3 outside)