PROGRAMMABLE SHARED MEMORY SYSTEM AND MEMORY SHARING METHOD

Title:

PROGRAMMABLE SHARED MEMORY SYSTEM AND MEMORY SHARING METHOD

Document Type and Number:

Japanese Patent JPH10133941

Kind Code:

A

Abstract:

To provide a shared memory system reducing system memory requests and a cost in total by improving the utilization of a memory without reducing the performance of the system.

Memory structure is realized by using dual bus structure provided with HPB(host processor bus) 203 and SMB(shared memory bus) 206 connected to CPU by a system controller 201 or connected to a peripheral device by a peripheral device controller 106. The memory structure if additionally provided with a memory constituted controller 202 connected to plural memories 104 which can be constituted within the system. Each constituted controller is connected with both of HPB and SMB. Under programmed control, each constituted controller connects a memory to HPB or SMB corresponding to constitution information stored in the system controller. The memory connected with HPB operates as a private processor memory and the memory connected with SMB operates as a shared memory accessable from a processor and any peripheral device within the system.

Inventors:

LUAN CHUNG-CHEN
CHONG SIU-MING
WANG JAMES H
WONG JOHN
YEH GONG-JONG

Application Number:

JP23607997A

Publication Date:

May 22, 1998

Filing Date:

September 01, 1997

Export Citation:

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Assignee:

NEC CORP

International Classes:

G06F13/16; G06F12/02; (IPC1-7): G06F12/02

Attorney, Agent or Firm:

Yosuke Goto (2 outside)

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