Title:
PULSE DURATION MODULATION DEVICE
Document Type and Number:
Japanese Patent JPH06216776
Kind Code:
A
Abstract:
PURPOSE: To improve the degree of integration in the production of single chip by comparing inverted data with a clock signal and outputting a high-potential or low-potential signal corresponding to the result. CONSTITUTION: Pulse width data D10 -D13 for determining the width of pulse are impressed from the outside to a register part 1 of storage circuit 10 simultaneously with the input of the same reset signal/RE as a power source VDD. These data D10 -D13 are impressed to an inverter part 12 of circuit 10, inverted and impressed to a comparator circuit 30. Besides, a counting means 20 counts a pulse width modulation enable signal inputted from the outside and the clock signal inputted by a reset signal. Then, the comparator means 30 compares the inverted data with the data of clock signals and when the inverted data are larger, the high-potential signal is outputted but when these data are smaller, the low-potential signal is outputted. This signal is shaped by a buffer part 31 of circuit 30, latched by an output circuit 40 and outputted. Then, data processing speed is accelerated, and the degree of integration in the production of single chip is improved.
Inventors:
KAN DAIKON
Application Number:
JP21966793A
Publication Date:
August 05, 1994
Filing Date:
September 03, 1993
Export Citation:
Assignee:
GOLD STAR ELECTRONICS
International Classes:
G06F1/025; H03K7/00; H03K7/08; H03M1/82; H03K5/05; (IPC1-7): H03M1/82; H03K5/05
Attorney, Agent or Firm:
Fukami Hisaro (3 outside)