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Title:
パルス幅変調回路
Document Type and Number:
Japanese Patent JP4424546
Kind Code:
B2
Abstract:
The present invention provides a pulse width modulation (PWM) circuit comprising an PWM control circuit for setting an output signal to low when a logical level of a oscillation signal at a first input terminal changes from low to high, for resetting the output level to low in response to an effective input signal at a second terminal, a charge and discharge means for charging a first node (node 1 ) when the output stays in low, for discharging the stored charge of node 1 when the output stays in high, a comparator (C 1 ) for outputting an output signal to the second terminal according to the first node signal and a first reference signal (Vref 0 ), a discharge current controlling means for the stored charge on the first node, wherein the discharge current controlling means comprises a bias circuit 2 for controlling the discharge current based on constant current.

Inventors:
Yuichi Matsushita
Application Number:
JP2005006777A
Publication Date:
March 03, 2010
Filing Date:
January 13, 2005
Export Citation:
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Assignee:
oki Semiconductor Co., Ltd.
Oki Micro Design Co., Ltd.
International Classes:
H03K7/08
Domestic Patent References:
JP10313235A
JP62245815A
JP1320813A
JP2001112251A
JP2003152508A
JP2004096982A
JP2004266780A
Attorney, Agent or Firm:
Koichi Suzuki



 
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