PURPOSE: To obtain the PWM pulse generating circuit reducing the capacitance of a filter provided on the output side of an inverter comprising semiconductor switching elements.

CONSTITUTION: In the PWM pulse generating circuit comprising a latch circuit latching a PWM waveform data consisting of plural bits of digital signals, a counter 1 shifting the PWM waveform data outputted from the latch circuit by 1/2 and receiving the result, and a counter 2 receiving the PWM waveform data as it is, the operating timing of the counters 1, 2 is adjusted by allowing the counter 1 to select via an AND gate 5 and allowing the counter 2 to select via an AND gate 6 thereby controlling the transmission of the PWM waveform data.