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Title:
RADIATION RESISTING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS60240156
Kind Code:
A
Abstract:

PURPOSE: To obtain a bipolar semiconductor integrated circuit having high radiation resistance, by providing an n+ layer in the vicinity of the surface of an n type base layer of a lateral p-n-p transistor, and generating a potential barrier against minority carriers.

CONSTITUTION: An n+ layer 33 is provided on the surface of a part of an n type epitaxial layer 3, which is to become the base region of a lateral p-n-p transistor. The emitter of the lateral p-n-p transistor is made to be a p+ type layer 22. The p+ type layer 22 is simultaneously formed in the ordinary manufacturing process of bipolar IC when a p type isolating and diffusing layer is formed. The p+ diffused layer 22, which is to become the emitter of the p-n-p transistor, is formed at a part deeper than a p type diffused layer 4 so that the layer 22 is contacted with an embedded n+ layer 6. In this constitution, the injection efficiency of the p-n-p transistor is increased and a current amplification factor is increased. At the same time, an inner electic field is generated in the n+ layer 33 on the base surface in the direction, which prevents the inflow of holes, i.e., minority carriers, into the surface part. The recombination current at the surface becomes very small.


Inventors:
TORIYABE TATSU
OKABE TAKAHIRO
Application Number:
JP9468484A
Publication Date:
November 29, 1985
Filing Date:
May 14, 1984
Export Citation:
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Assignee:
KOGYO GIJUTSUIN
International Classes:
H01L27/082; H01L21/8226; H01L27/02; (IPC1-7): H01L27/08
Domestic Patent References:
JPS5160177A1976-05-25
JPS5678154A1981-06-26