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Title:
READ-ONLY MEMORY CODE NUMBER VERIFICATION CIRCUIT
Document Type and Number:
Japanese Patent JPS6421951
Kind Code:
A
Abstract:

PURPOSE: To make it possible to easily detect an ROM code number from outside even after completion of sealing by a method wherein an input buffer, in which input level changes in accordance with the presence or non-presence of implanted ions, is provided on an input pad.

CONSTITUTION: A terminal PAD, to be connected to an outside lead, and an input buffer, the input level of which changes in accordance with the presence or non-presence of implanted ions, to be connected to said terminal PAD are provided on an integrated circuit containing a read-only memory is verified by detecting the input level from outside. For example, when a circuit is provided as shown in the diagram, a transistor 102 works as an enhancement transistor when ions are not implanted into the transistor 102, and the input buffer shows the input-output characteristics as shown by the dotted line (a) in the diagram. Also, when ions are implanted into the transistor 102, it work as the depression type transistor, it is always in a conductive state, and the input-output characteristics are brought into the state as shown by the solid line (b) in the diagram.


Inventors:
NAGAISHI HATSUHIRO
Application Number:
JP17826687A
Publication Date:
January 25, 1989
Filing Date:
July 16, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C17/00; G11C29/04; H01L27/10; (IPC1-7): G11C17/00; H01L27/10
Attorney, Agent or Firm:
Uchihara Shin