To share an external circuit with CPUs each having a different representation method at a time when data is represented by plural addresses.

In the case where representation methods at a time when data is represented by plural addresses are different between a CPU and an external circuit, data 82 is outputted to an external device through an endian conversion circuit 1712 that exchanges data stored in a first address with data stored in a second address when accessing data 81 stored in an internal register of the CPU by each address by bridging two addresses, thereby executing communication of the data between the CPU and external circuit.