Title:
スイッチング電力変換器の電力損失低減
Document Type and Number:
Japanese Patent JP4865783
Kind Code:
B2
Abstract:
Embodiments of the invention provide methods and apparatuses for concurrently eliminating or substantially reducing two or more switching losses in an inverter switching circuit. Embodiments of the invention concurrently reduce multiple types of switching losses under hard switching mode and soft switching mode for active switching devices and diodes. In one embodiment of the invention, the voltage across a switching device is substantially reduced during switch turn-off and/or turn-on time, and also maintained at a substantially reduced level throughout some or all of the tail current loss time of the switching device. The voltage reduction mechanism is implemented as a transformer circuit electrically serially implemented between the voltage source and the switching device. Other methods and apparatuses are also described.
Inventors:
Partridge, Don, F.
Application Number:
JP2008500881A
Publication Date:
February 01, 2012
Filing Date:
March 07, 2006
Export Citation:
Assignee:
One more time
International Classes:
H02M3/155; H02M7/48
Domestic Patent References:
| JP2001016083A | 2001-01-19 | |||
| JPS6369456A | 1988-03-29 | |||
| JP2000116120A | 2000-04-21 |
Attorney, Agent or Firm:
Akihiro Ryuka