PURPOSE: To raise the reliability of a memory system, by mkaing a titled device have capacity of plural times or more of the number of necessary words, and operating it by replacing with other memory block, when a fault occurs in a memory block.

CONSTITUTION: In a read-out cycle of a data, a read-out address 15 of an address counter 2 is inputted to as a memory address 16 to a memory body 1 through a selector 3, and from the body 1, a read-out signal is fetched as a data 12 through a bus transceiver 4. In accordance with the head address of the address 15, offset quantity is controlled from the outside by a start address control input 14. In case when a specified memory cell proves to be faulty by checking, etc., the control input 14 is inputted, a start address of the memory is shifted, that is to say, a readout address of the memory is offset, by which a faulty memory cell is detached from the operation object, and a normal operation is continued. In this case, a write address 13 sent from a CPU, etc. is also offset and is inputted.