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Title:
REFERENCE VOLTAGE GENERATING CIRCUIT, DISPLAY DRIVE CIRCUIT AND DISPLAY APPARATUS
Document Type and Number:
Japanese Patent JP3969422
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a reference voltage generating circuit to be generally used, regardless of the kind of display apparatus without increasing circuit scale, and to provide a display drive circuit, a display apparatus and a method for generating the reference voltage.
SOLUTION: The reference voltage generating circuit 48 includes first to third ladder resistance circuits 70, 72, 84. The first ladder resistance circuit 70 contains at least one variable resistance circuit, having a variable resistance at both ends and outputs a multi-level reference voltage. The second ladder resistance circuit 72 comprises a plurality of resistance circuits, having fixed resistance connected in series and outputs a plurality of reference voltages. The third ladder resistance circuit 74 contains at least one variable resistance circuit, with a variable resistance at both ends and outputs a multi-level reference voltage. The first to third ladder resistance circuits 70, 72, 74 are connected in series between first and second power supply lines. The resistance of the variable resistance circuits, included in the first and third ladder resistance circuits, is varied and controlled by a given command or a variable control signal from an external input terminal.


Inventors:
Akira Morita
Application Number:
JP2004376963A
Publication Date:
September 05, 2007
Filing Date:
December 27, 2004
Export Citation:
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Assignee:
Seiko Epson Corporation
International Classes:
G02F1/133; G09G3/20; G09G3/36; (IPC1-7): G02F1/133; G09G3/20; G09G3/36
Domestic Patent References:
JP2001022325A
JP2001100711A
JP11346132A
JP2001194643A
JP8313867A
JP11175027A
JP9080384A
JP5019725A
JP3203777A
JP60247379A
Attorney, Agent or Firm:
Inoue Ichi
Yukio Fuse
Mitsue Obuchi