Title:
RESYNCHRONIZING CIRCUIT FOR MAGNETIC DISK DEVICE
Document Type and Number:
Japanese Patent JPH01169779
Kind Code:
A
Abstract:
PURPOSE:To stabilize in-taking data by providing a delayed counter circuit, delaying and outputting a signal, and shifting a sampling time. CONSTITUTION:A starting signal (h) from a low order circuit synchronizes with an input clock signal (f) at a counter circuit 5, becomes active and inputs to holding circuits 1 and 2. In the circuits 1 and 2, a data signal (a) is stored alternately, the cycle of the signal (a) is doubled, and signals (b) and (c) are outputted to a selecting circuit 3. Besides, after a signal (h) waits for mere a value, which a command signal (i) indicates at a delayed counter circuit 6, signals (m) and (l) are inputted to the circuit 3. When the signals (m) and (l) are active, the circuit 3 inputs the corresponding signal (b) or (c) to a sampling circuit 4. In the circuit 4, the inputted data signal is sampled at a rethink clock (g) and outputted to a high order circuit. Thus, the time of sampling is shifted arbitrarily, a setting up time and a holding time, which become the subject of discussion, are evaded, and stable data can be in-taken.
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Inventors:
TAKIGAMI HIROBUMI
Application Number:
JP32909987A
Publication Date:
July 05, 1989
Filing Date:
December 24, 1987
Export Citation:
Assignee:
NEC CORP
International Classes:
G11B20/10; (IPC1-7): G11B20/10
Attorney, Agent or Firm:
Uchihara Shin