To limit a current flowing in the base section to a ridge area by specifying a width of a first semiconductor section and providing a diffraction grating formed by a triangular grove having the side surface of 111A crystal surface to at least a part of the first semiconductor section along the upper surface thereof so that it is located on an active layer.
A GaInAsP layer 5 is formed on a GaInAsP layer (active layer) 4, and a resist mask irradiated with electron beams is used to etch the GaInAsP layer 5 to form a wavy layer, which is used as the distributed feedback lattice. Since this etching is anisotropic etching, the etching rate for the 111A surface is very small and a triangular groove forming the 111A crystal surface as the side surface may be formed. A current flowing in the base area can be limited only to the ridge area by providing a dielectric material layer to the surface of the swelled semiconductor layer (reinforcing section) isolated by the groove from the ridge waveguides 7" and 8". In this case, width of the ridge (first semiconductor width) is set to 5 μm or less and 2 μm or more.
WESTBROOK LESLIE D
NELSON ANDREW W
