Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SAMPLING DEVICE
Document Type and Number:
Japanese Patent JP2001136036
Kind Code:
A
Abstract:

To provide a sampling device that prevents adverse effect on circuits on the post-stage of an analog/digital conversion circuit.

An analog/digital conversion circuit 40 converts an output signal from a gain control amplifier 10 into a digital signal, and a logarithmic amplifier 20 applies logarithmic conversion to the power of the output signal from the gain control amplifier 10 to output a resulting signal. A control circuit 60 predicts the power of an input signal to the analog/digital conversion circuit 40 in response to an output signal from the logarithmic amplifier 20 and starts collection of the digital signal outputted from the analog/digital conversion circuit 40 when it decides that the estimated power is below an upper limit samplable by the analog/digital conversion circuit 40.


Inventors:
MATSUGAYA KAZUOKI
Application Number:
JP31865099A
Publication Date:
May 18, 2001
Filing Date:
November 09, 1999
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
DENSO CORP
International Classes:
H03M1/18; H03G3/20; H03G3/30; (IPC1-7): H03G3/20; H03M1/18
Domestic Patent References:
JPH09186732A1997-07-15
JPH06244754A1994-09-02
JPH088747A1996-01-12
JPS6333222U1988-03-03
JPS6465927A1989-03-13
JPH09135134A1997-05-20
JPH1065540A1998-03-06
JPS5758414A1982-04-08
JPH10117219A1998-05-06
JPH04196622A1992-07-16
JPH06508012A1994-09-08
JPH1022758A1998-01-23
Attorney, Agent or Firm:
Yoji Ito (2 outside)



 
Previous Patent: BIAS CIRCUIT FOR MICROWAVE SEMICONDUCTOR DEVICE

Next Patent: AMPLIFIER CONTROLLER AND RECEIVER