SCHEDULING CONTROLLER - 富士通株式会社

Title:

SCHEDULING CONTROLLER

Document Type and Number:

Japanese Patent JP3506612

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To simplify the scheduling controller configuration without the need for high speed repetitive scheduling and a complicated arithmetic processing and to make the processing speed independent of a device.
SOLUTION: A request information management section 1 stores transmission request information from each input channel being a scheduling object with respect to a desired output channel. A scheduling processing section 4 retrieves an output channel denoted by an in-highway pointer control section 2 among the transmission request information, selects an output channel not reserved in other input channels, conducts scheduling for all input channels sequentially from the input channel denoted by an in-highway pointer control section 3, and updates each retrieval start output channel of the in-highway pointer control section 2 at a succeeding scheduling period. Priority patterns different for each channel are provided and a transmission channel is scheduled according to the priority pattern and the transmission request information. A pattern with different priority among the channels is provided and a start pattern of the priority pattern is changed for each scheduling period.

Inventors:

Naoki Matsuoka
Kenichi Kawarai
Hiroshi Tomonaga
Tsugio Kato

Application Number:

JP24533198A

Publication Date:

March 15, 2004

Filing Date:

August 31, 1998

Export Citation:

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