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Title:
SCHMITT CIRCUIT OF CMOS
Document Type and Number:
Japanese Patent JPS5616316
Kind Code:
A
Abstract:

PURPOSE: To obtain a Schmitt circuit having a hysteresis range which does not depend on the signal source impedance, by connecting longitudinally the CMOS inverters in three steps and then applying the feedback to the input terminal of the second step from the output terminal of the third step.

CONSTITUTION: CMOS inverters INV1∼INV3 are connected longitudinally, and at the same time feedback resistance Rf consisting of the pure resistance is connected between output end N13 of the third-step inverter INV3 and input terminal N11 of the second-step inverter INV2. Thus a Schmitt circuit is obtained. The input is supplied to the first-step inverter, and the Schmitt output of the same phase as the input is extracted out of output terminal N12 of the second-step inverter. The hysteresis range obtained at that time does not include the factor depending on the power supply impedance. In this way, a Schmitt circuit having the hystersis range which does not depend on the impedance of the signal source can be obtained.


Inventors:
OKAMOTO KEIZOU
TOMITA MASAYOSHI
TAKAGI OSAMU
Application Number:
JP9196979A
Publication Date:
February 17, 1981
Filing Date:
July 19, 1979
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K3/353; H03K3/027; H03K3/3565; H03K17/22; H03K17/30; (IPC1-7): H03K3/027



 
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