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Title:
SCREENING DEVICE FOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH03239977
Kind Code:
A
Abstract:

PURPOSE: To perform the screening with high accuracy by providing a stress load device for giving a stress electrically or as a temperature to an integrated circuit, a function inspecting device and a DC inspecting device.

CONSTITUTION: By a signal source 6, integrated circuits 2 - 4 of a screening object are driven, and by a stress load device 1, the circuits 2 - 4 are held at a high temperature. In such a state, a changeover switch 9 is connected to a function inspecting device 7 side, and also, a changeover switch 5 is switched, and a function of the circuits 2 - 4 is inspected by the inspecting device 7. Subsequently, when the time set to a controller 10 in advance elapses, the switch 9 is connected to a DC inspecting device 8 side, and also, the switch 5 is switched, and a DC inspection of a variation of a power source current of the circuits 2 - 4, etc., is executed by the inspecting device 8. Next, results of inspection of both the inspecting devices 7, 8 are counted up by the controller 10, and from this result, an increase rate of the number of function inspection failures to the screening time and an increase rate of the number of DC inspection failures to the screening time are graphed in a real time.


Inventors:
TATSUMA KENICHIRO
Application Number:
JP3801590A
Publication Date:
October 25, 1991
Filing Date:
February 19, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
G01R31/30; (IPC1-7): G01R31/30
Attorney, Agent or Firm:
Yoshihiro Morimoto



 
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