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Title:
SELECTION CIRCUIT
Document Type and Number:
Japanese Patent JPS55132583
Kind Code:
A
Abstract:

PURPOSE: To make small the size of the selection circuit on the semiconductor substrate, by providing the switching element controlled with the selection signal, allowing to make effective or ineffective the selected signal lines.

CONSTITUTION: The selection signal lines in crossing with the selected signal lines A1WAN extended from the line blocks D1WDM consist of a plurality (P) of selection signal lines B1WBP only, and the selection signal generating circuit Y is provided at the buffer circuit K. With this constitution, from the relation that MIS transistor Qa inserted to selected signal line Ai of the blocks D1WDM is the MIS transistor given the selection signal Sb obtained at the signal line Bb, when the signal Sb is given to the signal line Bb from the circuit Y, all Qa's inserted to the signal line Ai are ON, implying the selection of the signal line Ai, and the selected signal Ei is inputted to each of the blocks D1WDM via the signal line Ai of each of the terminals T1WTM and the blocks D1WDM. Accordingly, when the number of lines P is not smaller than 2, the value of the number N of the signal lines A1WAN can remarkably be greater.


Inventors:
KOUDA SHIGETO
SAKAI SHIGENOBU
KIKUCHI HIDEO
KITANO YOSHITAKA
Application Number:
JP4051879A
Publication Date:
October 15, 1980
Filing Date:
April 04, 1979
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03K17/00; G11C8/12; G11C11/413; (IPC1-7): G11C8/00; H03K17/693



 
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