PURPOSE: To provide a clock generator for clock-operating a CMOS integrated circuit microprocessor which applies a clock signal having the first and second phases of a continuous time enough to receive intra microprocessor delay generated from a microprocessor speed path.

CONSTITUTION: A clock generator 10 generally includes a latch 12, buffer means 14, delaying means 16, and input conditioning means 18 connected with an outside clock source 20. The latch 12 includes a set input 22, reset input 24, and output 26. The delaying means 16 includes an inverter 28, and it is connected through the input conditioning circuit 18 between an output 26 of the latch 12 and a reset input 24 of the latch 12. The buffer means 14 includes a pair of inverters 30 and 32 which apply a buffer-operated output clock signal to be applied to a CMOS circuit constitution used in an integrated circuit at an output 34 of the inverter 32.