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Title:
SELF-COMPENSATING DIFFERENTIAL AMPLIFIER
Document Type and Number:
Japanese Patent JP3428886
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To manufacture an inexpensive and sturdy logarithm amplifier chip by permitting differential amplifiers to be gain stages in a successive compression amplification system constituted of differential limitter amplifier stages.
SOLUTION: The effect of temperature and process fluctuation against a transfer function regulated for the respective gain stages 10 and respective mutual conductance stages 12 in a successive compression amplifier cascade is controlled. When the temperature rises, for example, a curve becomes flat and limit voltage Vb drops. When the temperature falls on the other hand, voltage Vb boosts. Process fluctuation during manufacture brings a difference in the thickness of gate oxide and a charge shift degree in a finished chip and it also changes the value of voltage Vb. In the gain stages 10 in the monolithic current cascade of the differential limitter gain stages 10, the cost of the logarithm amplifier is made to be minimum and the request of whole power and space is made to be minimum.


Inventors:
Bitrio Comino
Application Number:
JP35721497A
Publication Date:
July 22, 2003
Filing Date:
December 25, 1997
Export Citation:
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Assignee:
Lucent Technologies, Inc.
International Classes:
H03G11/00; G06G7/24; H03F1/30; H03F3/45; H03F3/60; H03F3/68; H03G7/00; H03G11/08; (IPC1-7): H03F3/45; H03F1/30; H03F3/60; H03F3/68; H03G11/00; H03G11/08
Domestic Patent References:
JP7106875A
JP5252020A
JP3121512A
JP7147523A
JP7154176A
JP4354203A
JP5967018U
JP559968U
Attorney, Agent or Firm:
Masao Okabe (11 others)