To shorten the time required for testing I/O blocks included in a semiconductor circuit and to decrease the number of pins for judging output results.
A test select circuit 10 outputs block select signals to all I/O blocks 2-1,..., 2-N upon receiving a test signal 'H' on a test signal line 11. The I/O blocks 2-1,..., 2-N being fed through block select signal lines 4-1,..., 4-N takes in a same input signal from an input bus 6 in synchronism with an operation clock and place the results on output buses 7-1,..., 7-N. Outputs from the output buses 7-1,..., 7-N are fed to a comparing/matching circuit 13 and comparison results of output signals from the I/O blocks 2-1,..., 2-N are obtained from the comparison results output terminal 14. Test results can be judged based on the comparison results and the output signal from one I/O block without confirming the output signals from all I/O blocks 2-1,..., 2-N.
KIDO NAOSHIGE
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