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Patent Searching and Data


Title:
SEMICONDUCTOR CIRCUIT
Document Type and Number:
Japanese Patent JPH10197608
Kind Code:
A
Abstract:

To shorten the time required for testing I/O blocks included in a semiconductor circuit and to decrease the number of pins for judging output results.

A test select circuit 10 outputs block select signals to all I/O blocks 2-1,..., 2-N upon receiving a test signal 'H' on a test signal line 11. The I/O blocks 2-1,..., 2-N being fed through block select signal lines 4-1,..., 4-N takes in a same input signal from an input bus 6 in synchronism with an operation clock and place the results on output buses 7-1,..., 7-N. Outputs from the output buses 7-1,..., 7-N are fed to a comparing/matching circuit 13 and comparison results of output signals from the I/O blocks 2-1,..., 2-N are obtained from the comparison results output terminal 14. Test results can be judged based on the comparison results and the output signal from one I/O block without confirming the output signals from all I/O blocks 2-1,..., 2-N.


Inventors:
SAITO NORIKO
KIDO NAOSHIGE
Application Number:
JP547397A
Publication Date:
July 31, 1998
Filing Date:
January 16, 1997
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L21/822; H01L27/04; G01R31/28; (IPC1-7): G01R31/28; H01L27/04; H01L21/822
Attorney, Agent or Firm:
Matsumura Hiroshi