Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2017126774
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device which achieves downsizing in a plan view.SOLUTION: A semiconductor device includes: a die pad part 11 having die pad surfaces 111, 112 facing opposite sides; a semiconductor chip 41 disposed on the die pad surface 111; a semiconductor chip 42 disposed on the die pad surface 112; and a sealing resin part 7 covering the die pad surfaces 111, 112. The sealing resin part 7 includes: a resin part 71 covering the semiconductor chip 41; and a resin part 72 covering the semiconductor chip 42. The resin part 71 has a resin surface 713, and the resin part 72 has a resin surface 723 which contacts with the resin surface 713.SELECTED DRAWING: Figure 6
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Inventors:
KIMURA AKIHIRO
SUNAGA TAKESHI
YASUNAGA SHOJI
KOGA AKIHIRO
SUNAGA TAKESHI
YASUNAGA SHOJI
KOGA AKIHIRO
Application Number:
JP2017050910A
Publication Date:
July 20, 2017
Filing Date:
March 16, 2017
Export Citation:
Assignee:
ROHM CO LTD
International Classes:
H01L23/29; H01L23/31; H01L23/50
Domestic Patent References:
JPH08124952A | 1996-05-17 | |||
JPH11204724A | 1999-07-30 | |||
JPH1093015A | 1998-04-10 | |||
JPH10214934A | 1998-08-11 | |||
JPH09270435A | 1997-10-14 | |||
JPH06112674A | 1994-04-22 | |||
JP2007165585A | 2007-06-28 | |||
JP2008084978A | 2008-04-10 | |||
JPH03278561A | 1991-12-10 |
Foreign References:
US20030227751A1 | 2003-12-11 |
Attorney, Agent or Firm:
Minoru Yoshida
Nao Usui
Nao Usui