Title:
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH05110109
Kind Code:
A
Abstract:
PURPOSE: To integrate MOS type elements having gate insulating films different in structure from each other under the same layer gate electrodes with high reliability by a simple process.
CONSTITUTION: A first MOS transistor Q1 and a second MOS transistor Q2 having different gate insulting film structures are integrated on a p-type silicon substrate 1. The gate insulating film of the first MOS transistor Q1 is constituted of a layer of oxide film 3, and that of the second MOS transistor Q2 has a laminated structure of an oxide film 4, its overlying nitride film 5 as a mask material film having resistance to oxide film etching, and its surfacing oxide film 6.
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Inventors:
ENDO TETSUO
SHIRATA RIICHIRO
SHIRATA RIICHIRO
Application Number:
JP26490991A
Publication Date:
April 30, 1993
Filing Date:
October 14, 1991
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H01L21/318; H01L21/8247; H01L29/788; H01L29/792; (IPC1-7): H01L21/318; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Takehiko Suzue