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Title:
SEMICONDUCTOR DEVICE AND ITS TESTING METHOD
Document Type and Number:
Japanese Patent JP2004226115
Kind Code:
A
Abstract:

To provide a testing method for a semiconductor device capable of precisely testing characteristics of semiconductor switches without requiring a special terminal for testing.

During a characteristic testing of a semiconductor device 100, a control circuit 102 corresponding to a first output circuit sets both P-type MIS transistor TP1 and N-type MIS transitor TN1 to be turned on. Another control circuit 102 corresponding to a second output circuit sets a P-type MIS transistor TP2 turned on and an N-type MIS transistor TN2 turned off. A current source is connected between a probe #1 and a probe #4, and electric potential difference between an output terminal Dout1 of the first output circuit and an output terminal Dout2 of the second output circuit is measured by using probes #2 and #3 to measure the on-resistance of the P-type MIS transistor TP1.


Inventors:
ABE TSUNEO
Application Number:
JP2003011440A
Publication Date:
August 12, 2004
Filing Date:
January 20, 2003
Export Citation:
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Assignee:
ELPIDA MEMORY INC
International Classes:
G01R31/28; G01R31/00; G01R31/26; H01L21/822; H01L27/04; (IPC1-7): G01R31/28; H01L21/822; H01L27/04
Attorney, Agent or Firm:
Kiyoshi Inagaki



 
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