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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH04179162
Kind Code:
A
Abstract:

PURPOSE: To enable a semiconductor device to be lessened in substrate current and prevented from deteriorating in electrostatic breakdown strength at its periphery connected to external input/output terminals by a method wherein a MISFET of double drain structure small in diffusion depth is used at the periphery of the device and a MISFET large in diffusion depth is used at the center of the device.

CONSTITUTION: A semiconductor region 26 is formed on a semiconductor substrate 27, and a field oxide film 23 is formed. Then, an insulating film 22 is formed, and then a conductive layer 21 is formed by doping it with phosphorus. Then, a MISFET 2 forming region whose periphery does not deteriorate in electrostatic breakdown strength is covered with a mask 31, and phosphorus ions are implanted into a third semiconductor predetermined region 25. Next, the mask 31 is removed, and a diffusion process of the implanted phosphorus is performed in an oven to form a third semiconductor region 25. Phosphorus ions are implanted into a region where an Nch-MISFET is to be formed, and arsenic ions are successively implanted. A diffusion process of implanted phosphorus and arsenic are performed in an oven, whereby a second semiconductor region 29 of arsenic and a third semiconductor region 30 of phosphorus are formed corresponding to a diffusion coefficient difference between phosphorus and arsenic.


Inventors:
SHINOMURA KATSUMI
Application Number:
JP30276490A
Publication Date:
June 25, 1992
Filing Date:
November 09, 1990
Export Citation:
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Assignee:
ASAHI CHEMICAL MICRO SYST
International Classes:
H01L27/06; H01L21/8234; H01L27/092; (IPC1-7): H01L27/092
Attorney, Agent or Firm:
Kazuo Watanabe