PURPOSE: To provide a semiconductor device having a CMOS logical gate, the level of integration of which can be enhanced and which can be manufactured through simplified processes.

CONSTITUTION: A p-type silicon substrate 10 having n+ diffusion layers 11 and 12 and an n-type silicon substrate 20 having p+ diffusion layers 21 and 22 are jointed with an insulating middle layer 30 therebetween. A common gate electrode 31 clad with gate oxide films 32 and 33 are formed in a part of the middle layer 30, thereby controlling NMOS on the side of the p-type silicon substrate 10 and PMOS on the n-type silicon substrate 20. Inter-substrate wirings 34 are used for inter-substrate connection.