Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH11214410
Kind Code:
A
Abstract:
To reduce variation of characteristics such as threshold voltage attributable to variation of carrier density and sheet resistance of an active layer in a semiconductor device containing a Pt-buried type Schottky electrode.
After measuring the sheet resistance of the region in which a Schottky electrode is to be formed in a semiconductor substrate 1, the thickness of a Pt layer that is the lowest layer of the Schottky electrode 8 is determined based on the sheet resistance. The Pt layer, an Mo layer, a Ti layer and an Au layer with the same thickness are laminated and heat-treated. Consequently, the Pt layer is diffused on the semiconductor substrate 1 so that the Schottky electrode 8 is formed.
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Inventors:
MARUKAWA TAKU
YAMAMOTO TEIJI
YAMAMOTO TEIJI
Application Number:
JP2386298A
Publication Date:
August 06, 1999
Filing Date:
January 20, 1998
Export Citation:
Assignee:
MURATA MANUFACTURING CO
International Classes:
H01L29/872; H01L21/338; H01L29/47; H01L29/812; (IPC1-7): H01L21/338; H01L29/812; H01L29/872
Attorney, Agent or Firm:
Nakano Masafusa