PURPOSE: To enable high-speed action by contriving the reduction in resistance of a diffused layer by a method wherein a metal silicide layer is formed on the surface of the source-drain region of a three-dimensional CMOS device.

CONSTITUTION: A field oxide film 2 is formed on the main surface of an N type Si substrate 1, and the first gat oxide film 3 is formed in the active region. Using a gate electrode 4 as a mask, a P+ diffused layer 5 the source-drain region is formed. An epitaxial layer 6 is formed on the gate electrode 4 and in its periphery, and an SiO2 film 7' is obtained by patterning after the whole surface is coated with an SiO2 film 7. A high melting point metal 8 is evaporized, and ions are implanted. Only the metal 8 on an N+ diffused layer 6' is silicified by activating the implanted ions. Then, a high melting point metal silicide layer 8' is obtained by removing the metal 8 on the SiO2 film 7' with an etchant having selectivity. This manner can reduce the reduce the resistance of the diffused layer and increase the operating speed of the device.