Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2014157906
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method and a semiconductor device, which can avoid decrease in intensity of a connection part such as a micro bump by side etching and a Cu pillar.SOLUTION: A semiconductor device manufacturing method comprises: first forming an electrode 12 and an insulation film 13 on a semiconductor substrate 11; subsequently forming a conductive layer 15 on the insulation film 13 of the semiconductor substrate 11; forming on the conductive layer 15, a resist film having an opening at a part corresponding to the electrode 12; and subsequently forming a metal plating layer 18 on an inner side of the opening of the resist film by electrolytic plating. In this plating process, a plating solution enters between the resist film around the resist opening and the conductive layer to form a flange. The semiconductor device manufacturing method comprises: removing the resist film; subsequently forming an oxide film 15a by oxidizing a surface of the conductive layer 15 at an exposed part; and subsequently removing the oxide film 15a and the conductive layer 15 under the oxide film 15a by etching.
Inventors:
KOJIMA ISAO
AKUTAGAWA YASUHITO
AKUTAGAWA YASUHITO
Application Number:
JP2013027472A
Publication Date:
August 28, 2014
Filing Date:
February 15, 2013
Export Citation:
Assignee:
FUJITSU SEMICONDUCTOR LTD
International Classes:
H01L21/60
Domestic Patent References:
JPH11274201A | 1999-10-08 | |||
JP2008028112A | 2008-02-07 | |||
JP2012204391A | 2012-10-22 |
Attorney, Agent or Firm:
Keizo Okamoto
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