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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2009147019
Kind Code:
A
Abstract:

To alleviate displacement between a semiconductor element and an electrode, the displacement being caused by a dimensional change of a wiring board in bare chip mounting by flip chip or ILB such as COF.

The wiring board 1 includes a first bonding wiring array 9 that is formed by extending conductor wirings 2, and that extends from an external side of a semiconductor element region and is bonded individually to a first element electrode array 5 of the semiconductor element 4, and a second bonding wiring array 10 that extends from the external side of the semiconductor element region and is bonded individually to a second element electrode array 7 of the semiconductor element. A pitch of the individual conductor wirings constituting the first bonding wiring array varies continuously so as to be wider than a pitch of the first element electrode array on the external side of the semiconductor element region and narrower than that of the first element electrode array at a front end on a center side of the semiconductor element, and a pitch of the individual conductor wirings constituting the second bonding wiring array varies continuously so as to be narrower than a pitch of the second element electrode array on the external side of the semiconductor element region and wider than that of the second element electrode array at a front end on the center side of the semiconductor element.


Inventors:
SHIMOISHIZAKA NOZOMI
NAGAO KOICHI
Application Number:
JP2007321210A
Publication Date:
July 02, 2009
Filing Date:
December 12, 2007
Export Citation:
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Assignee:
PANASONIC CORP
International Classes:
H01L21/60; H01L23/12; H05K1/02
Attorney, Agent or Firm:
Ikeuchi, Sato & Partners