Title:
半導体装置封止用金型およびそれを用いた半導体装置封止方法
Document Type and Number:
Japanese Patent JP3609821
Kind Code:
B1
Abstract:
To provide a semiconductor device sealing metal die and semiconductor device sealing method in which an internal structure and a control system are simplified and a high-function semiconductor device can be sealed with resin.
A pin-point gate 38 is provided on the line that is positioned on the lower side of an inner lead 55 and connects approximately the centers of the opposed sides of a semiconductor device 50, on a bottom surface of a cavity 61 confronted to a lower surface of an island 52.
COPYRIGHT: (C)2005,JPO&NCIPI
Inventors:
Nishiguchi Masashi
Hiroyuki Kitamura
Hiroyuki Kitamura
Application Number:
JP2003273553A
Publication Date:
January 12, 2005
Filing Date:
July 11, 2003
Export Citation:
Assignee:
Daiichi Seiko Co., Ltd.
International Classes:
B29C33/12; B29C45/14; B29C45/27; H01L21/56; B29K105/22; B29L31/34; (IPC1-7): H01L21/56; B29C33/12; B29C45/14; B29C45/27
Domestic Patent References:
| JP9066535A | ||||
| JP9199524A |
Attorney, Agent or Firm:
Hiroshi Yamazaki
Atsushi Maeda
Takanobu Nakajima
Atsushi Maeda
Takanobu Nakajima
Previous Patent: METHOD FOR MANUFACTURING MAGNETORESISTIVE EFFECT ELEMENT
Next Patent: LIGHT EMITTING DIODE PRINTHEAD
Next Patent: LIGHT EMITTING DIODE PRINTHEAD