Title:
半導体装置の試験方法及び試験装置
Document Type and Number:
Japanese Patent JP4322396
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method and device for testing semiconductor device by which the reliability parameters of wiring can be found individually and accurately at conducting of reliability evaluation tests on the wiring in the state of a wafer. SOLUTION: The temperature and stress current of wiring for test on a wafer 10 are individually controlled, by causing the wiring to generate Joule heat by making an electric current generated by superposing an alternating current and a direct current upon another to flow to the wiring, and individually changing the alternating and direct currents.
Inventors:
Hiroki Kondo
Atsushi Suzuki
Norika Shimizu
Atsushi Suzuki
Norika Shimizu
Application Number:
JP2000130404A
Publication Date:
August 26, 2009
Filing Date:
April 28, 2000
Export Citation:
Assignee:
富士通株式会社
International Classes:
G01R31/30; H01L21/66
Domestic Patent References:
| JP8293532A | ||||
| JP7130816A | ||||
| JP9246342A | ||||
| JP11026535A | ||||
| JP6151537A | ||||
| JP4298058A |
Attorney, Agent or Firm:
Keizo Okamoto