Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2018133118
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To solve an issue that operation speed cannot be increased while ensuring a large sense margin in a conventional semiconductor.SOLUTION: According to one embodiment, a semiconductor device comprises a storage element MC, a bit line BL, a precharge transistor applying a precharge voltage VR to the bit line BL, a sense amplifier 18 switching logic level of an output signal according to a comparison result of a drawing current of the storage element MC and a reference current, a clamp transistor 42 provided between the bit line BL and the sense amplifier 18, and a clamp voltage output transistor 34. A gate of the clamp voltage output transistor 34 is commonly connected to a gate of the clamp transistor 42, a source and a back gate are connected, and the precharge voltage VR is applied to the source, a drain and the gate are commonly connected, and a ground voltage is applied to the back gate of the clamp transistor 42.SELECTED DRAWING: Figure 3
Inventors:
IWASE TAKASHI
MATSUBARA KEN
MATSUBARA KEN
Application Number:
JP2017024664A
Publication Date:
August 23, 2018
Filing Date:
February 14, 2017
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
G11C16/06
Attorney, Agent or Firm:
Ken Ieiri