Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3122756
Kind Code:
B2
Abstract:
PURPOSE: To embody a neuron computer chip capable of highly integrating and saving a nerve circuit network by constituting synapse coupling, using a neuron MOSFET (νMOS) and a small number of devices.
CONSTITUTION: In terms of a neuron computer circuit 101, a wiring 101, which receives an inlet signal from input terminals 102a to 102d and transmit an output signal, holds the potential of VDD or OV. One neuron output 103 and an input of one neuron 101 are connected with a circuit 104 which operates as a synapse. Source electrodes 106a and 108a of an NMOS transistor 105 and a PMOS transistor 107 are connected to one input terminal 102 of the neuron circuit 101 while a drain 106b of the NMOS transistor 105 and a drain 108b of the PMOS transistor are connected to the VDD and the grounding.
Inventors:
Naoshi Shibata
Tadahiro Ohmi
Tadahiro Ohmi
Application Number:
JP1378091A
Publication Date:
January 09, 2001
Filing Date:
January 12, 1991
Export Citation:
Assignee:
Naoshi Shibata
UCT Co., Ltd.
I&F Co., Ltd.
UCT Co., Ltd.
I&F Co., Ltd.
International Classes:
G06F15/18; G06G7/60; G06N3/063; G06N99/00; H01L21/822; H01L21/8247; H01L27/04; H01L27/10; H01L27/115; H01L29/788; H01L29/792; H03K17/687; H03K17/00; (IPC1-7): H01L27/115; G06F15/18; G06G7/60; H01L21/822; H01L21/8247; H01L27/04; H01L29/788; H01L29/792
Domestic Patent References:
| JP274053A | ||||
| JP36679A |
Attorney, Agent or Firm:
Hisao Fukumori