Title:
半導体装置
Document Type and Number:
Japanese Patent JP5593025
Kind Code:
B2
Abstract:
An impurity element imparting one conductivity type is included in a layer close to a gate insulating film of layers with high crystallinity, so that a channel formation region is formed not in a layer with low crystallinity which is formed at the beginning of film formation but in a layer with high crystallinity which is formed later in a microcrystalline semiconductor film. Further, the layer including an impurity element is used as a channel formation region. Furthermore, a layer which does not include an impurity element imparting one conductivity type or a layer which has an impurity element imparting one conductivity type at an extremely lower concentration than other layers, is provided between a pair of semiconductor films including an impurity element functioning as a source region and a drain region and the layer including an impurity element functioning as a channel formation region.
Inventors:
郷戸 Hiromitsu
Hidekazu Miyairi
Hidekazu Miyairi
Application Number:
JP2008300469A
Publication Date:
September 17, 2014
Filing Date:
November 26, 2008
Export Citation:
Assignee:
Incorporated company semiconductor energy research institute
International Classes:
H01L29/786