Title:
半導体装置
Document Type and Number:
Japanese Patent JP6412842
Kind Code:
B2
Abstract:
To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.
Inventors:
Hidekazu Miyairi
Kengo Akimoto
Nakamura Yasuo
Kengo Akimoto
Nakamura Yasuo
Application Number:
JP2015185481A
Publication Date:
October 24, 2018
Filing Date:
September 18, 2015
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786; G02F1/1368; H01L21/336; H01L51/50; H05B33/14
Domestic Patent References:
| JP2007123861A | ||||
| JP9270517A | ||||
| JP2164042A | ||||
| JP200077666A |